mirror of https://github.com/ethereum/go-ethereum
Merge pull request #17368 from karalabe/bn256-go1.11
crypto/bn256: fix issues caused by Go 1.11pull/17401/merge
commit
2a06791461
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// Package cpu implements processor feature detection for
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// various CPU architectures.
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package cpu |
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// CacheLinePad is used to pad structs to avoid false sharing.
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type CacheLinePad struct{ _ [cacheLineSize]byte } |
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// X86 contains the supported CPU features of the
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// current X86/AMD64 platform. If the current platform
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// is not X86/AMD64 then all feature flags are false.
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//
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// X86 is padded to avoid false sharing. Further the HasAVX
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// and HasAVX2 are only set if the OS supports XMM and YMM
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// registers in addition to the CPUID feature bit being set.
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var X86 struct { |
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_ CacheLinePad |
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HasAES bool // AES hardware implementation (AES NI)
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HasADX bool // Multi-precision add-carry instruction extensions
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HasAVX bool // Advanced vector extension
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HasAVX2 bool // Advanced vector extension 2
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HasBMI1 bool // Bit manipulation instruction set 1
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HasBMI2 bool // Bit manipulation instruction set 2
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HasERMS bool // Enhanced REP for MOVSB and STOSB
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HasFMA bool // Fused-multiply-add instructions
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HasOSXSAVE bool // OS supports XSAVE/XRESTOR for saving/restoring XMM registers.
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HasPCLMULQDQ bool // PCLMULQDQ instruction - most often used for AES-GCM
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HasPOPCNT bool // Hamming weight instruction POPCNT.
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HasSSE2 bool // Streaming SIMD extension 2 (always available on amd64)
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HasSSE3 bool // Streaming SIMD extension 3
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HasSSSE3 bool // Supplemental streaming SIMD extension 3
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HasSSE41 bool // Streaming SIMD extension 4 and 4.1
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HasSSE42 bool // Streaming SIMD extension 4 and 4.2
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_ CacheLinePad |
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} |
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package cpu |
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const cacheLineSize = 32 |
@ -0,0 +1,7 @@ |
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package cpu |
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const cacheLineSize = 64 |
@ -0,0 +1,16 @@ |
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build 386 amd64 amd64p32
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// +build !gccgo
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package cpu |
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// cpuid is implemented in cpu_x86.s for gc compiler
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// and in cpu_gccgo.c for gccgo.
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func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32) |
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// xgetbv with ecx = 0 is implemented in cpu_x86.s for gc compiler
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// and in cpu_gccgo.c for gccgo.
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func xgetbv() (eax, edx uint32) |
@ -0,0 +1,43 @@ |
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build 386 amd64 amd64p32
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// +build gccgo
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#include <cpuid.h> |
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#include <stdint.h> |
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// Need to wrap __get_cpuid_count because it's declared as static.
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int |
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gccgoGetCpuidCount(uint32_t leaf, uint32_t subleaf, |
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uint32_t *eax, uint32_t *ebx, |
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uint32_t *ecx, uint32_t *edx) |
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{ |
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return __get_cpuid_count(leaf, subleaf, eax, ebx, ecx, edx); |
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} |
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// xgetbv reads the contents of an XCR (Extended Control Register)
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// specified in the ECX register into registers EDX:EAX.
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// Currently, the only supported value for XCR is 0.
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//
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// TODO: Replace with a better alternative:
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//
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// #include <xsaveintrin.h>
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//
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// #pragma GCC target("xsave")
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//
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// void gccgoXgetbv(uint32_t *eax, uint32_t *edx) {
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// unsigned long long x = _xgetbv(0);
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// *eax = x & 0xffffffff;
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// *edx = (x >> 32) & 0xffffffff;
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// }
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//
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// Note that _xgetbv is defined starting with GCC 8.
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void |
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gccgoXgetbv(uint32_t *eax, uint32_t *edx) |
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{ |
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__asm(" xorl %%ecx, %%ecx\n" |
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" xgetbv" |
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: "=a"(*eax), "=d"(*edx)); |
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} |
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build 386 amd64 amd64p32
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// +build gccgo
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package cpu |
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//extern gccgoGetCpuidCount
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func gccgoGetCpuidCount(eaxArg, ecxArg uint32, eax, ebx, ecx, edx *uint32) |
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func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32) { |
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var a, b, c, d uint32 |
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gccgoGetCpuidCount(eaxArg, ecxArg, &a, &b, &c, &d) |
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return a, b, c, d |
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} |
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//extern gccgoXgetbv
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func gccgoXgetbv(eax, edx *uint32) |
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func xgetbv() (eax, edx uint32) { |
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var a, d uint32 |
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gccgoXgetbv(&a, &d) |
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return a, d |
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} |
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build mips64 mips64le
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package cpu |
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const cacheLineSize = 32 |
@ -0,0 +1,9 @@ |
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build mips mipsle
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package cpu |
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const cacheLineSize = 32 |
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build ppc64 ppc64le
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package cpu |
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const cacheLineSize = 128 |
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package cpu |
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const cacheLineSize = 256 |
@ -0,0 +1,55 @@ |
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build 386 amd64 amd64p32
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package cpu |
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const cacheLineSize = 64 |
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func init() { |
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maxID, _, _, _ := cpuid(0, 0) |
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if maxID < 1 { |
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return |
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} |
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_, _, ecx1, edx1 := cpuid(1, 0) |
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X86.HasSSE2 = isSet(26, edx1) |
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X86.HasSSE3 = isSet(0, ecx1) |
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X86.HasPCLMULQDQ = isSet(1, ecx1) |
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X86.HasSSSE3 = isSet(9, ecx1) |
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X86.HasFMA = isSet(12, ecx1) |
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X86.HasSSE41 = isSet(19, ecx1) |
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X86.HasSSE42 = isSet(20, ecx1) |
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X86.HasPOPCNT = isSet(23, ecx1) |
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X86.HasAES = isSet(25, ecx1) |
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X86.HasOSXSAVE = isSet(27, ecx1) |
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osSupportsAVX := false |
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// For XGETBV, OSXSAVE bit is required and sufficient.
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if X86.HasOSXSAVE { |
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eax, _ := xgetbv() |
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// Check if XMM and YMM registers have OS support.
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osSupportsAVX = isSet(1, eax) && isSet(2, eax) |
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} |
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X86.HasAVX = isSet(28, ecx1) && osSupportsAVX |
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if maxID < 7 { |
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return |
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} |
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_, ebx7, _, _ := cpuid(7, 0) |
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X86.HasBMI1 = isSet(3, ebx7) |
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X86.HasAVX2 = isSet(5, ebx7) && osSupportsAVX |
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X86.HasBMI2 = isSet(8, ebx7) |
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X86.HasERMS = isSet(9, ebx7) |
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X86.HasADX = isSet(19, ebx7) |
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} |
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func isSet(bitpos uint, value uint32) bool { |
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return value&(1<<bitpos) != 0 |
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} |
@ -0,0 +1,27 @@ |
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// Copyright 2018 The Go Authors. All rights reserved. |
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// Use of this source code is governed by a BSD-style |
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// license that can be found in the LICENSE file. |
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// +build 386 amd64 amd64p32 |
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// +build !gccgo |
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#include "textflag.h" |
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// func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32) |
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TEXT ·cpuid(SB), NOSPLIT, $0-24 |
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MOVL eaxArg+0(FP), AX |
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MOVL ecxArg+4(FP), CX |
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CPUID |
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MOVL AX, eax+8(FP) |
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MOVL BX, ebx+12(FP) |
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MOVL CX, ecx+16(FP) |
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MOVL DX, edx+20(FP) |
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RET |
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// func xgetbv() (eax, edx uint32) |
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TEXT ·xgetbv(SB),NOSPLIT,$0-8 |
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MOVL $0, CX |
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XGETBV |
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MOVL AX, eax+0(FP) |
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MOVL DX, edx+4(FP) |
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RET |
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